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Now_With_Underscores
Posts: 345
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Re: 4072 internal timing

As Chris mentioned, the 4072 routes your DUT current through a 500mΩ series sense resistor.  The differential voltage across that sense resistor is then gained up (gain depends on current range) and then converted to a current using I=V/R.  You can use a small resistor to measure the current, but the smaller that resistor is, the more gain you'll need to apply to accurately measure the differential voltage.  The main issue with decreasing the resistor below a certain point is that the system noise floor approaches your differential voltage.  The 407x DMMs are able to use such a small sense resistor due to their low noise design; you'll need a larger resistor on an external design.

 

A 10Ω sense resistor with 100uA through it produces a 1mV differential output.  Placing the 6259 into the ±100mV (lowest) range yields an offset+uncertainty of 19.5uV (the gain uncertainty due to a measurements up to 1mV is miniscule: 15nV)... so the 6259 in the 100mV range with up to 1mV input voltage will have ~2uA uncertainty at 0A nominal (not including the uncertainty of your 10Ω resistor)...  Can your test system live with that kind of performance? 

 

Note that if you're measuring other signals on the 6259, you'll need to ensure sufficient settling time as the ADC+mux acquires each input... another reason to consider a simultaneous acquisition. 

 

If a 10Ω sense resistor is still too large, we can keep looking at using the 4072.  Let us know and we can take a look at your code

-John S
National Instruments
Analog Engineer
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Erich_Schlieper
Posts: 15
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Re: 4072 internal timing

Ok, I think we're getting a little off topic.  Using the DMM is fine, the real issue is that the different tasks and/or connections to trigger lines or something else in that chain is not working or I'm not configuring it correctly.  Can we move back towards looking for that solution? 

 

I understand the theory behind what I'm trying to do, it's the application that is not lining up with what I understand to be the design intent in the NI hardware.

 

Please help me get that situated and then we can have a discussion about the different ways I could have done this and maybe come up with something better but right now I'm kind of under the gun a little. 

 

Thanks for the help so far.

Erich

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Erich_Schlieper
Posts: 15
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Re: 4072 internal timing

So I managed to get it worked out.  It turns out that because the DMM has both a sample trigger source and a trigger source you have to plop down the separate trigger source specification VI and then it all works perfectly the way it should.  I'm good now.  Thanks for all your help and suggestions.

Erich

Active Participant
Now_With_Underscores
Posts: 345
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Re: 4072 internal timing

Hey Erich,

 

Glad to hear you're up and running.  Apologies the syntax is confusing.

-John S
National Instruments
Analog Engineer
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