What is the highest resolution pulse I might Achieve w/ cRIO

[yakir]

I want to develop pulse manager with 9075 cRIO and 9402.

I synchronize 4 DO which I have some logics between them. What is the resolution 

i might acheive between 2 pulses - one rising and the other falling?

And what is the 10nsec response time of the 9402 means (and what's the connection to te 40MHz clock of the FPGA?)

Summary - Can anyone please arrange my mind about timing in cRIO...

Thanks,

Yakir.

[crossrulz]

I'm not sure where you are seeing a 10ns response time.  What I see is 55ns propagation delay, which is the time it takes for the module to read it and send it on the the FPGA.

In this setup, you are limited by what the module can do.  So with 4 channels, the max rate you can read/write is 16MHz (20MHz for 2 channles).  The 40MHz clock on the FPGA is the clock rate for processing the data.

[yakir]

Hi

Thanks!

So the shortest pulse I might achieve is 1/16MHz? I did measure a 2usec difference between two signals, 1 rise and 1 falls..

[yakir]

Let me try to explain myself better:

I would like to build a "Pulse Manager" using the hardware mentioned.

This manager will produce 4 dependent digital pulses, with maximal synchronization between them.

I used the occurrence functions in Labview FPGA, and created each pulse in a different loop, and another loop that manages the sequences. 

Is anyone can tell me if there's a better implementation (HW and SW) for my system?

Thanks,

Yakir.