I am using PCI 6534 to generate a digital communication protocol in which the clk and the data lines are shown in the image. I am not able to generate an output at 8MHz. Explaining how I implemented the protocol, . I configured the DAQmx write as 1D U8 1 channel N lines.To generate a clk of frequency ‘f’ , I have to set the DAQmx internal clk frequency to ‘4f’ and give 4 samples for each pulse of clk as shown in the picture. If I use lines 0 for clk and 1 for data on a port then the input to DAQmx write for the first data is 10,11,11,10 in binary. For one bit of data I give 4 samples to generate and so on.
I am not able to generate a frequency of f=2MHz where in the DAQmx timing I set 8MHz.Beyond 5MHz any frequency set in DAQmx timing function is yielding a final clk pulse of 600ns which corresponds to 6.66MHz frequency . Could anyone let me know if I am crossing any limitation here? In the specifications it is mentioned that the max frequency that can be generated is 20MHz. I am trying a value no where near it.
