False 100ms switching pulse NI9401 outputs?

[embedded1988]

Hi everyone,

I am facing a very serious problem in my LabVIEW FPGA project, I am using the NI9401 DIO module and in a simple program in FPGA I provide all 8 channels FALSE in a loop, but when I access this FPGA VI from RT VI, when I exit the RT VI I have a unnecessary 100ms pulse on all 8 channels. I am attaching both VI,s images. PLEASE HELP IN THIS REGARDS!

This pulse actually makes a dangerous short circuit in my DC Converter.

With Best Regards,

azy

[embedded1988]

 i used the close FPGA reference with 'close and reset if last reference' in RT VI.

Any help in this regard is appreciated.

Regards,

azy

[embedded1988]

Please guide me in this regard, especially all NI Applications Engineers.

Regards,

azy

[SimonHofmann]

Hello embedded1988

To prevent the digital lines from going high, do not abort the FPGA VI from the Close FPGA VI Reference. Instead, programmatically stop the FPGA VI with a stop button from the host interface. Call the abort method from the host using the Invoke Method on the FPGA palette. Finally, modify the Close FPGA VI Reference.vi to only Close the reference rather than choosing to Close and Reset. To adjust this setting, right-click on the Close FPGA VI Reference.vi and change the VI to Close. This will prohibit the VI from continuing to run.

Best Regards

Simon Hofmann