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FPGA digital inputs

I'm using an NI 7811R. This might be a stupid question, but do the digital inputs on the 7811R have a specific impedance or current limit? 

 

When I plug my quadrature pulse signal into the 7811R (via connector block) I get a reduction in voltage. Additionally, the quadrature input pulses seem to show up slightly on different digital channels. For example, I can see a blip on channel A when channel B goes to a zero.

 

I want to try to make changes on my circuit to accommodate a specific load (if possible) but the manual only seems to give info regarding current on the outputs.

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Hey pewt,

 

It sounds like you are experiencing some ghosting. Take a look at this article and see if any of the suggestions there help out.

 

http://digital.ni.com/public.nsf/allkb/73CB0FB296814E2286256FFD00028DDF

 

Regards,

 

Doug B

Applications Engineer
National Instruments
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Hi Pewt,

 

Generally speaking the input impedance can be assumed to be relatively high in relation to the TTL standard, i.e. very little current will be drawn or sunk. It is hard to define this precisely with TTL due to its variation under different conditions which is why I believe a value hasn't been provided on the datasheet.

 

Could you provide any more details about your quadrature pulse source such as voltage and relative output impedance? Is it a TTL device?

 

This is a digital device, so ghosting won't be the issue here regarding the apparent crosstalk. How large is the blip you are seeing?

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The output device is a BEI encoder running at 5V-24V. I built a little circuit (just a couple resistors and a  zener diode) to ramp down the voltage on each differential channel if it is over 6V or so. I run the differential channels into a line receiver (a TI MC3486N) and the output of the line receiver is connected directly to the FPGA connector block. 

 

The line receiver should be outputting TTL signals and if I use an oscilloscope on its outputs (with the FPGA disconnected) the square wave is pretty clean. Once I connect both channels to the connector block, a blip of around 100mV or so appears on each channel at the 90 degree points. At this point the blip is not large enough to cause errors, but it concerns me nonetheless.

 

I am using a non-shielded 68-pin cable to connect to the FPGA: could that be the cause?

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