FPGA IP integration

[Mejdi]

Hello,
I'm trying to add a VHDL IP to an FPGA project in simulation mode,
But none of outputs are moving

Any help?

[eaguero]

Hi Mejdi

I think this is a good guide to follow:

http://www.ni.com/white-paper/7444/en/

Please let me know if it is useful for you

[Mejdi]

Thank you for your response
My problem is not addin an IP but simulating it in simulation mode.
I noticied that when i use IP with no clock and reset it works, but when I add clock and reset nothing works.

[eaguero]

Mejdi

In this link are written all the requirements for simulation mode.

http://zone.ni.com/reference/en-XX/help/371599J-01/lvfpgaconcepts/ipin_prepare_ip/

This ones have more information about it:

http://zone.ni.com/reference/en-XX/help/371599J-01/lvfpgahelp/ipin_gen_sim/

http://zone.ni.com/reference/en-XX/help/371599J-01/lvfpgaconcepts/ipin_sim/

Thank you