BASIC FPGA CLOCKING SIGNAL

[incisive]

HI 

I have 2 questions.

1) Can I use data port as clock signal? If yest, How do I assign/export a 60MHz generated clock to the lvds clock out signal on NI 6587 adaptor module.

Similarly if we are using an external clock as input,  is it necessary to assign **bleep** to dedicated strobe out signal? Can't data port be used as clock signal within the labview software?

2) Can we change clock edges? I am currently working on the positive edge of the clock. When I switch SMAs from  p to n and n to p, the software does not run. how do u change clock edge in labview  when using NI 7962R FPGA module and  NI 6587 adaptor module?

thanks

[Stop_Luke_and_Listen]

Hi incisive,

I believe the following article will answer your first question: http://digital.ni.com/public.nsf/allkb/7958A6FA2ABDB84A862575910079B926.

I'm going to have to look further into changing the clock edge in LabVIEW before I can give you a clear answer on your second question.

[incisive]

Well thanks for sharing the article but it simply tells us how to use the dedicated clock out and strobe signals for importing and exporting clock. My question is what if i want to use lvds data lines in both the cases? Is that possible. especially if i want to export clock to data line or simply connect the generated clock to data line.

[Stop_Luke_and_Listen]

I guess I'm still a little confused on what you are trying to do.  Could you tell me exactly what signals you want to export and where you want them to go (a diagram might help)?

Thanks!