Dear all,
This is my first time with PXIe-654x family. After several search I was unable to find an example with generation/acquisition in PXIe-6544 board. Here below is what I will try to do.
Clock always bellow 10 MHz. Same clock for all generation/acquisition cases. Sometime I have to change the clock.
But not during generation/acquisition.
All signals with 3.3V logic.
Channels initialy configured as input-output. Once configured channels configuration don´t change.
channels configuration are:
Input 10 Channels.
All managed as a pattern.
Output 4+1 chanels:
Generate a pattern using 4 channels (3.3V).
When a particular pattern in the 10-channel input generate burst in 5th output channel.
Work sequence is like:
1-Configure clock.
2- start generation 4-channels pattern and then maintain continuosly during all the process.
3-Monitor 10-channels input if specifc pattern appears trigger 5th output burst.(specific pattern may appear every 110 clcok pulses)->If appears generate burst in 5th output channel.(this functionality shall be maintained when pattern is generating)
4- When specific pattern appears store the 10-channels pattern in memory during 100.000 clock pulses.
5.- Once allocated download this patern for SW check in processor (this has not be done in "real time" in PXI)
Steps 4 and 5 can be repeated during several times with different pattern recognition.
