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24 v digital out signal from host event to fpga turning on and off

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Hello Ni forums 

 

Hardware Specs

 

crio 9074 

c series module ni 9472 module digital 24 V output

 

 

To expand on the subject describes,

 

I want to be able send an alarm trigger to the fpga 9472 digital out that lasts for 30 seconds using the real time os clock time on the host

 

 

 

The way I approached this problem is that 

 

In the loop where the event occurs , if the event trigger is set then the fgv has a time stamp of when the event occured is sent.

In the loop that communicates with the fpga control, I write to the control based on the condition that if the difference the of the current time checked and the time from the fgv is less than or equal to 30 secs then it will send a true value, else  send false and wait for the next event occurence.

 

The main problem after implementing this is that the 9472 led does not turn off when a false value is send to it.

 

regards Mzamanstl

 

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Sounds like you have a code issue.  Have any you can share to help us help you.

 

And I would do all of the timing inside of the FPGA.  It makes things simpler on the RT OS and then you just have to send the current state of the alarm to the FPGA.


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Mzamanstl,

 

Could you attach screenshots of how you are programming this portion of your code?

Kelli Kravetz
Product Marketing Manager
LabVIEW, LabVIEW NXG, LabWindows/CVI, Measurement Studio
National Instruments
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 I have attached the code as images part of a zip file

 

event.png is the where the event occurs after the data has been processed and the alarm shutdown property is set to true(need this property to be true to trigger the shutdown) 

 

 

eventsend.png is where I send the event trigger to the fgv and to record the timestamp as to when it occurred 

 

settime.png is where I set the time for the(timekeeperfgv.vi) fgv  and the internal structure of the fgv itself which is to init, set and get timestamp from this fgv

 

verifytime.png is code where I do the timing and verify and is sub task of the main loop fpga communication which keeps the open fpga reference alive from iteration to iteration otherwise I can't have new data(daq is another subtask of the main loop,not shown) to do the alarming for the next dataset. I have other lights set on alarm(with shutdown trigger set to false) and alert, but those lights do not need to have a timing period as the only thing it does is to show that it is in alarm or alert.

 

lightswitch.png this is the code in the fpga that turns LED on and off with the c series module 9472  24v do , it is a seperate process that is asynchronous and independent  from all the other processes on the fpga.

 

 

crossrulz : I will try what you suggested 

ikelli: here are the screenshots

 

regards Mzamanstl

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In the verifytime.vi the logic for the time seems to be wrong or I am missing something.  When you have the the current timestamp subtracting the Time Keeper SD, it calls the Time Keeper SD every time the loop iterates.  Double check how the Time Keeper SD is grabbing the time.  If it grabs the current time each time it is called, the logic will yield a zero every time instead of approaching 30.

Kelli Kravetz
Product Marketing Manager
LabVIEW, LabVIEW NXG, LabWindows/CVI, Measurement Studio
National Instruments
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Solution
Accepted by topic author mzamstl

Timer Keeper SD is a FGV so it is written to it once the event occurs 

 

So if the event occurs then timestamp is stored and then the difference of the timestamp result is <30 secs

 

then a true value will be sent  to the 9472 module

 

 

So basically I want the light to turn on and I want to the 24 v do ouput for 30 secs  then turn off and wait for the next occurence 

 

I think the method I'm testing this with is not very good, because I just realized other factors that could contribute to this problem so I think I found another way to test it 

 

and I am going to try it but its going to take time.

 

regards Mzamanstl

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