How to initialize 6602 MITE in 64 bit Operating System using Register Level Programming

[ItaiH]

Hello,

I was asked to port our existing 32 bit Windows kernel mode driver for the NI 6602 card to 64 bit Windows.

While examining our driver code, I happened to see that our driver contains the following MITE intialization code:

1) It writes to address 0xC4 in PCI BAR 0 the value ((p & 0xffffff00) | 0x8C) where p is physical address of PCI BAR 1.

2) It writes to address 0xF4 there value 0.

It seems that this process is documented in the NI 660X Register Level Programmer Manual, November 2002 edition, page 3-55 - MITE.

The 0xC4 register is called IOWBSR1, and according to the RLP manual, it contains a 24 bit base address (BA_31..8), and a 5 bits field called WSIZE (Window Size).

My questions are as follows:

1. If I understand correctly, on 64 bit systems, system RAM can be mapped to physical addresses whose least significant 32 bits can overlap (32 bit) addresses used by BAR 1 of the 6602 card (this is more probable in systems with more than 4 GB of RAM).

What will happen if the CPU will try to write to a RAM address that is mapped to such an overlapping physical address? Will the 6602 card respond to this write, because the IOWBSR1 configures only the BA_31..8 bits of the address)? Or will thje write somehow get ignored. If it will be ignored, what causes it to be ignored? (Excuse me for my lack of knowledge in the PCI field).

I will put some numbers here to make my question more clear:

Let's assume that the 6602's BAR 1 is mapped to physical address 0x8000.

And let's assume that the system contains 8 GB of RAM which is mapped to addresses from 4GB to 12GB.

The CPU wants to write to RAM address 0x100008000, which is a 64 bit address whose least significant 32 bit bytes are 0x8000. Will the 6602 card respond to this write?

2. What exactly does the 6602 card do with the value that the CPU writes to address 0xC4? I detected that in earlier versions of our 32 bit driver, the driver wrote a wrong value (garbage) to register 0xC4 (and soon after that it wrote again to the same register a good value). What can theoretically happen in that case? Note I have not seen any wierd results (yet).

3. What is the meaning of the "Window size" field and why is it set to 12 (0xC) ?

Thank you in advance,

Itai

[JoeFriedchicken]

Hi Itai,

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ItaiH wrote:

I was asked to port our existing 32 bit Windows kernel mode driver for the NI 6602 card to 64 bit Windows.

While examining our driver code, I happened to see that our driver contains the following MITE intialization code:

1) It writes to address 0xC4 in PCI BAR 0 the value ((p & 0xffffff00) | 0x8C) where p is physical address of PCI BAR 1.

2) It writes to address 0xF4 there value 0.

It seems that this process is documented in the NI 660X Register Level Programmer Manual, November 2002 edition, page 3-55 - MITE.

The 0xC4 register is called IOWBSR1, and according to the RLP manual, it contains a 24 bit base address (BA_31..8), and a 5 bits field called WSIZE (Window Size).

---

The MITE initialization code you mentioned does something different. It doesn't initialize the device for 32-bit or 64-bit operation, but instead it configures the MITE to communicate with other chips on the 6602. If your driver writes incorrect values to the 0xC4 and 0xF4 BAR0 registers, it's possible that some reads/writes from the device will not complete. The exact behavior changes depending on the values written to those registers. Going into more detail than that is not helpful.

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ItaiH wrote:

1. If I understand correctly, on 64 bit systems, system RAM can be mapped to physical addresses whose least significant 32 bits can overlap (32 bit) addresses used by BAR 1 of the 6602 card (this is more probable in systems with more than 4 GB of RAM).

What will happen if the CPU will try to write to a RAM address that is mapped to such an overlapping physical address?

---

This statement is correct -- a high-address can alias a low-address -- but this situation cannot happen for the 6602 because it is a 32-bit PCI card that uses a 32-bit PCI slot (as opposed to a 64-bit slot). Your system's BIOS/UEFI detects PCI cards and assigns them 32-bit BAR addresses before the OS even loads.

PCI Slots

The simplest way to update your 660x driver to support a 64-bit environment is to make your driver mimic a 32-bit environment. For example, when allocating memory, ask the Windows kernel to use 32-bit addresses. This is particularly important if your driver uses DMA -- when the MITE performs DMA, it uses 32-bit reads/writes to 32-bit addresses.

For example, from the Windows Driver Model (WDM) example code io.cpp:

//
// Allocate DMA Memory
//
maxPhysicalAddress.LowPart  = 0xffffffff;
maxPhysicalAddress.HighPart = 0x00000000;

kernelAddress = MmAllocateContiguousMemory(sizeInBytes, maxPhysicalAddress);

Otherwise, the usual 32-to-64-bit porting advice applies, the largest being make sure any interfaces that use pointers and lengths use the correct-sized types

[ItaiH]

Joe,

Thank you for your detailed answer.

Itai