Buffered Edge Counting > 20 MHz with duplicate count prevention

[qnguyen]

Dear all,

I went through the specs of several boards (M- series, S- and E- series, 6602 etc...). It seems that these boards can count edges with duplicate count prevention on at a maximum rate <= 20 MHz (i.e., 1/4 of 80 MHz) - but maybe I have misunderstood the docs.

Is there a NI board capable of buffered edge counting with a general purpose counter for random events going at rates from 0 Hz to > 20 MHz? Do I need to look for a reconfigurable board?

Thanks in advance.

[Elizabeth W]

Hello qnguyen,

I am not sure where you got the spec stating that these devices can count edges with dupilicate count prevention only up to 20 MHz.  Could you clarify where that spec comes from?

Will you be using the device's internal 80 MHz timebase as the source for the buffered counter input task?  Duplicate count prevention is normally used to ensure that a counter returns correct data in applications that use a slow or non-periodic external source.  So, if you could clear up the application a bit and why you are using duplicate count prevention, it would help.  If you haven't seen this resource already, you may find it useful: Using Duplicate Count Prevention for Counter Tasks in NI-DAQmx.

Since the Counter/Timer series boards and the M series boards can have a source frequency of up to 80 MHz, I would expect this to work fine to count events occuring at 20 MHz.

[qnguyen]

Dear Elizabeth,

Thanks for the answer.

In my application, events arrive asynchronously (actually, randomly). During the duration of a gate (namely, 1 microsecond), one expects anything from 0 to many (i.e., possibly more than 20, up to 80) events. This requires duplicate count prevention. 

I may have misunderstood the specs for M series boards, but the document:

Using Duplicate Count Prevention for Counter Tasks in NI-DAQmx

from the NI web site, for instance, states that:

"All the other timebase edges that occur while the external source input is high are ignored. If no source edges are detected between two gate edges, as shown in Figure 3, duplicate count prevention ensures that pulse measurements return zero because the external source must be logic high to allow the internal timebase to increment the count register. This reduces your maximum source frequency to quarter of the original maximum (80MHz) timebase for NI-STC II and NI-TIO boards. Therefore duplicate count prevention should only be used if the frequency of the Source signal is 20 MHz or less.

Duplicate count prevention should only be use in the following situations:

• Counter measurements
• The counter Source is using an external signal (such as PFI x)
• The frequency of the external source is 20 MHz or less

"

What's your take on that?

Thanks for your time.

[Elizabeth W]

Hello qnguyen,

I believe there may be a misunderstanding here.  You mention "During the duration of a gate (namely, 1 microsecond), one expects anything from 0 to many (i.e., possibly more than 20, up to 80) events. This requires duplicate count prevention. "  However, in duplicate count prevention, the correct way to connect the signals would be to connect the known 80 MHz timebase to the source and then connect the unknown signal to the gate, not the source.  For more information about this, see Using Duplicate Count Prevention for Counter Tasks in NI-DAQmx.

So, you do not have an external source with a frequency of 20 MHz or less.  You have a known source of 80 MHz and an unknown gate signal.  Do you see the difference?

I hope I have explained this clearly.  Please let me know if this helps.

[_Basil_]

If anybody from this topic is still around here - I need your advice regarding the very similar question. This thread doesn't have any logical end, would you be so kind just o reply if you are available, or if the problem was solved?

[Jacobson-ni]

Basil,

As you noticed, this thread is pretty old.  I would recommend creating a new post with your specific question and reference this thread if you thought it would be relevant.