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CompactRIO Waveform Library

Hello, I'm a student that I've to do a project using LabVIEW and this examples are very useful for the application that I'm looking for. But I've many questions that I'd like to solve.

I'm using a cRIO-9025 controller with a cRIO-9118 chassis. The module that I'm working with now is a NI 9239 (so I'm using DeltaSig program). And I'm acquiring only voltage signal of a function generator to learn how to acquire signals.

The questions are:

 

FPGA part


1)Why Data Rate [Index/Ticks] is 1?

2)Why Samps per Chan [Finite] are 5120? It's because of FIFO size? If I do a continuous acquisition, what I've to put so?

3) If I want to do a continuous acquisition (with RT Cont Acq) I change the acquisition type to continuos in the FPGA, but I obtain an error:

Error -5000 ocurred at rwfm_Read(poly).vi

Possibles reason: Read timeout: this errors occurs if the Read VI does not receive all the requested samples before the user specified timeout period. Make sure the FPGA VI was started or increase the timeout. 

I'm sure that the FPGA is started, and the timeout is the predetermined in the example.

4) Why you put this size in the FIFO? Why you don't increase it?

 

RT part


Continuous acquisition


1)Samples per channel are 25600. What's the maximum that we can put?

2)In AcqConfig, sample mode is Finite, why? Samples per channel are 1000, it's caused by the FIFO size?

3)In BufferCfg buffer size is 500000, is it the maximum?

4)In AcqRead, what is the meaning of poll time? And why the timeout(s) is 5?

 

Finite acquisition


- The same questions except the third one.

 

Simulation

I've run the continuous mode configuring the FPGA as finite mode because if I put continuous mode I get the errore mentioned before. The program works and the acq doesn't stop, on the other hand in the plot I can only see until 0,5 seconds more or less, the acq doesn't continue.

 

I know that there are many questions that are really simple, but I've read many tutorials and I can't understand that. I hope your answers.

 

Thank you very much, and sorry for discomfort.

 

 

 

 

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I've solved most questions, on the other hand there are some that I'd like to solve:

FPGA part

1)SOLVED

2)Why Samps per Chan [Finite] are 5120?

3)SOLVED

4) Why you put this size in the FIFO? Why you don't increase it?

 

RT part


Continuous acquisition


1)SOLVED

2)In AcqConfig, Samples per channel are 1000, it's caused by the FIFO size?

3)In BufferCfg buffer size is 500000, is it the maximum?

4)In AcqRead, what is the meaning of poll time? And why the timeout(s) is 5?

 

Thank you again

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Hi,

 

I'm trying to use the Continuous Acquisition example but when I add more modules the FPGA is stopped because the number of channels is not the same, but I've changed everything that is needed to make it run. I've followed the PDF attached with this palette to configure all. I attach the RT and the FPGA code, any help will be greatful. Two more questions that I have are:

-How I add the new channels in the graph indicator?

-How I add more channels in Channel Scaling info?

 

Thanks.

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Hi,

 

I'm not sure if I'm too late but here's the answer anyway:

 

1. Add the channels to the "Channel Info" control in the RT VI.

2. Channel count of the "Channel Info" must match the channel count of the I/O-node in the FPGA VI.

3. Adjust the array subset length of the "Chan Scale array" according to note C in the FPGA VI.

 

Hope this helps!

 

-Matti

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Hello,

 

I am using the Continuous Acquisition [SAR] example and I am executin my FPGA VI on the Development computer with simulated I/O (using random data for I/O). I moved my RT host VI on the develoment computer. However, when I run the RT host VI, I get the Error -5001 with 'Module underflow' indicator ON.

 

Error_Module Underflow.png

 

It seems the FPGA acquisition loop does not process fast enough and the RT VI times out and throws the Module Underflow indicator. I have tried different methods like reducing the sampling rate, reducing processes from the FPGA VI's acquisition loop but to  no avail. The "acquisition loop ticks" counter inside the FPGA VI always exceeds the "data rate" (loop ticks) for the acquisition loop.

 

When I run the application on the real target and not on the development computer I get the Error -5000 'Read Timeout' on the RT host vi.

 

Kindly suggest how to overcome this issue. Really appreciate your help!!

 

Thanks,

Chetan  

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Message 65 of 115
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Hi folks!

Does anybody know if the cRIO Waveform Reference Library works with the new Labview 2013? I would like to update my system ... but if the library is not supported I would crash my system...

Best wishes,

Luke
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The library works just fine in 2013.

 

Best Regards,

 

Jeff Tipps

Systems Engineer

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Many thanks for the fast reply, and the god news.

Best wishes,

Luke
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Hi,

 

I'm part of a research project and we've been working with the cRIO Waveform Reference, for data aquisition with the FPGA, and it's going well. Now we're interested in using an Analog Output module to replicate some signals that we have stored in text files, for the purpose of testing some algorithims acquiring those signals. I was wondering if there's any similar library to optimize the use of the FPGA for outputing signals or any other solution in that regard.

 

Thanks,

 

Andre Lebedev

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Message 69 of 115
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I believe I need to use this cRIO Waveform Reference Application. There seems to be three ref designs. Does anyone know which one the the "main" design, the one that most people use? What are the essential differences between the three?Thanks cc

 

1. NI CompactRIO Waveform Reference Library
http://zone.ni.com/devzone/cda/epd/p/id/6206
(this one refs. the on below)
Reference Application for NI CompactRIO Waveform Acquisition
http://sine.ni.com/nips/cds/view/p/lang/en/nid/209114

 

2. cRIO Vibration Data Logger Reference Design
http://zone.ni.com/devzone/cda/epd/p/id/6388

 

LabVIEW FPGA Waveform Acquisition and Logging on Compact RIO (in LabVIEW 2013)

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