05-28-2010 09:13 AM
I adjusted the factor down to 5 and now get past the previous error. I only have a single channel and am sampling at 40kHz.
Now I get a -5002 error:
Error -5002 occurred at rwfm_AcqRead(1D_EncodedRaw).vi
FPGA DMA Overflow
How can I determine what is the cause?
01-04-2011 07:41 PM
The software requirements vs.. download filename in the "introduction" seem to contradict the "requirements" section at the bottom of the article. What file should I download for LV 8.6?
Am I missing something?
01-05-2011 08:01 AM
This is an issue with the publishing software that we use here to make these web pages. Version 305 is for LabVIEW 2010 and version 271 is for 8.6.
S&V Systems Engineer
08-09-2011 12:02 PM
I have some questions about this library:
1. I have installed this library by using VIPM, and it is supposed to appear under the User Libraries palette. but I cant find it there. see the 2 attached pics. Where can I find it?
2. I am using NI 9264 and NI 9205 modules, are they Delta-Sigma-Based C Series Modules or successive approximation (SAR) Modules? I dont really understand the difference of these two kinds of ADC methods.
08-09-2011 01:10 PM
1. The library should show up under user.lib. Do you have any other versions of LabVIEW that it might have installed to? Could you look in ../Program Files/National Instruments and see how many LabVIEW directories you have? Each LabVIEW directory fi you have more than one version of LabVIEW installed will have a user.lib sub folder. Try to find where those VI's went.
2. The 9205 is a "SAR" based analog input module. The 9264 is an analog output module which doesn't have support in the cRIO Waveform Library. I have been thinking about adding it but there just hasn't been that much demand for it. Typically analog output modules in cRIO are being used for single point control applications which is not the intended use case of this toolset.
The only difference between SAR modules and Delta Sigma modules is the way the sample rates are set on the FPGA. With SAR modules the sample rate is set with a "Loop Timer" VI and with Delta Sigma modules the sample rate is set with a property node.
S&V Systems Engineer
08-10-2011 10:48 AM
I am trying to implement this application into my system, but encourtered a problem in the first step----Open FPGA reference.
I noticed you bind the function with a ctl document (attached). if I dont bind this function with proper ctl document, I would get a breaken wire (attached). Could you please expalin how to build the Type Definition in this application. in which VI you built the rwfm_Acq FPGA Ref.ctl?
08-10-2011 11:05 AM
08-23-2011 09:14 AM
First let me just say that this application is excellent!
I have several cRIO-9022 units with NI-9215 modules. I have been attempting to use this application to stream 4-16 channels of analog data to a USB HDD. To date I have been able to acheive the following using .tdms files:
100kS/s/ch on 4 Channels
50kS/s/ch on 8 Channels
30kS/s/ch on 16 Channels.
I would like to be able to increase the sample rate to 100kS/s/ch on 8 channels and 50kS/s/ch on 16 channels. To try an accomplish this I have attempted to write the data in 1D Scaled U32 per the poly vi and using the write binary vi. However, I can't seem to find a good Samples per Read value that keeps the RT Buffer Backlog [%] from increasing over time and then ultimatly overflowing the FPGA DMA.
1. Are the metrics for streaming to disk based on the internal memory of the cRIO or and extrenal USB HDD?
2. What is the best selection of Samples per Read for a given sample rate such that the FPGA buffer does not overflow?
3. What is the best method to extract the indivual channel information when using the 1D Scaled U32 method?
4. Along the same lines as 3 how do you extract the data once it has been written to a binary file.
I certainly appreciate your help.