Components

[Christian_L]

Post your questions or feedback on the cRIO Information (CRI) component here.

[StevenA]

Thanks Christian... I look forward to trying it out.

[JoeC]

In the Dynamic FPGA Code Selection section of the document, the paragraph states, "Using the CRI component you can detect the current configuration of modules in the backplane and can then select the proper FPGA bitstream to download and run. This detection and selection of the FPGA bitstream will be part of LabVIEW Real-Time application running on the cRIO controller."

How do you programmatically pick an PFGA bitstream to download?  Is there a function in the CRI library that does this?

Thanks,
Joe 

[Christian_L]

No. Currently you need to include a separate Open FPGA VI Reference node for each FPGA VI/bitstream that you want to run and then select the appropriate node using normal LV programming such as a Case structure.

[JoeC]

Thanks for the reply.  Please allow me to post an theoretical example to see if I understand what you are saying. 

Let's say I have a 9205 cRIO module in a 4 slot 9013 backplane.  If I wanted to have an application that detected which slot the 9205 is plugged in, I would create 4 different FPGA VIs that were configured for each to have the 9205 in each slot.

I would then use the CRI tools to detect which slot the module is located in.  I would then have in my controller application, a case statement with 4 different "Open FPGA VI Reference Function" that will call each of the slot configured FPGA VIs.  I assume it is at this time that when an Open FPGA VI Reference Function is called that the bitstream is loaded?

Thanks again for your clarifications...

Joe

[Christian_L]

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JoeC wrote:

Thanks for the reply.  Please allow me to post an theoretical example to see if I understand what you are saying. 

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Exactly correct.

[RayKF]

Hi,

Does this tool work for R-Series (78xx) cards? Or do you have a separate tool / VIs for the R-series?

Cheers,

-Ray

[Christian_L]

This tool should work for any PCI/PXI-based R series devices as well, but you will need to add the R series cards as additional backplanes in cri_cRIO Vendor and Components Library.vi which is a VI used to define all of the device IDs that the CRI tool knows about.

This tool will not work for PCIe/PXIe-based boards and devices such as the PCIe-785xR cards.

Device IDs for some R series devices:

PCI-7811R: 0x702F

PXI-7811R: 0x702E

PCI-7813R: 0x7194

PXI-7813R: 0x7193 

PCI-7830R: 0x7056

PXI-7830R: 0x7055

PCI-7831R: 0x702D

PXI-7831R: 0x702C

PCI-7833R: 0x7083

PXI-7833R: 0x7074

PCI-7841R: 0x7393

PXI-7841R: 0x7390

PCI-7842R: 0x7394

PXI-7842R: 0x7391

PCI-7851R: 0x7386

PXI-7851R: 0x7384

PCI-7852R: 0x7387

PXI-7852R: 0x7385

PCI-7853R: 0x7395

PXI-7853R: 0x7392

PXI-7854R: 0x73E1

[TylerDurden]

Hey,

very great set of VIs. We are using these features in a component on our cRIOs. These VIs work with LV8.6.1 and LV2009SP1 very good, but on LV2010 the VI cri_RT Ping Controllers.vi is broken and the VI itself is password-protected. Is there an update for the CRI component or how can we fix this to support our applications with LabVIEW 2010.

Thanks for your replies.

Tyler

[Christian_L]

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TylerDurden wrote:

In LV2010 the VI cri_RT Ping Controllers.vi is broken and the VI itself is password-protected. Is there an update for the CRI component or how can we fix this to support our applications with LabVIEW 2010.

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Attached is an updated copy of this VI.