From Friday, April 19th (11:00 PM CDT) through Saturday, April 20th (2:00 PM CDT), 2024, ni.com will undergo system upgrades that may result in temporary service interruption.

We appreciate your patience as we improve our online experience.

Components

cancel
Showing results for 
Search instead for 
Did you mean: 

[Deprecated] SPI Digital Waveform Library

I would like to understand the oversample clock rate...

 

Looking into the SPI timing, it appears that the minimum period is t2 + t3 = 6ns...

But it says that the maximum serial clock speed is 50MHz (20ns).

Lower clock speed would mean higher time period so the 6ns minimum period would definitely cannot be met.

 

Is this related to the oversample clock rate? kindly explain with computation.

 

 

Download All
0 Kudos
Message 151 of 200
(1,911 Views)

Hello David,

 

Can you help me display the correct waveform for the following timing info:

 

CS lead = 8ns

CS trail=10ns

CS idle=20ns

MOSI setup=3ns

SCLK hold=3ns

 

because when i input this into the sample code you provided, it does not output the correct digital waveforms.

kindly explain the relationship of the oversample clock with the timing;

 

 

0 Kudos
Message 152 of 200
(1,900 Views)

the statement at number #2 is confusing when referenced to the block diagram.

it says that generation engine will start first before the aqcuisition part.

 

but why is it that the error line connects to the Acquisition initiate vi first? shouldn't it be connected to the Gen initiate vi and then the error line is routed to the input of the Acquisiotion initiate vi?

0 Kudos
Message 153 of 200
(1,881 Views)

Hi,

 

I am new here. I have a PCI-6023E card and want to know if it is possible to communicate with spi devices using labview.

 

regards , Henk

0 Kudos
Message 154 of 200
(1,851 Views)

Hi,

  I have 8-bit address and 48 bit data.  I am trying to create 7 - 8bit registers to get the info using Labview program.  Instead of getting the data after first 8 bit, there is some delay and getting the data after ~32 clk cycle.  Attached are the screen shots of my labview setup and the waveforms.  Can anyone help?

 

Thanks

Download All
0 Kudos
Message 155 of 200
(1,799 Views)

I'm using this library on cards PXIe-6535, with settings:

Sample_rate 10M (default)

Samples_to_allocate 100k (default)

Sample_quantum 2 (default)

 

Did not had time to debug how to adjust those :), works with those which is satisfying me and a customer 🙂

 

SPI_timing_ns are setled according to SPI communication requirements, as an example:

MOSI_Setup 6k

SCLK_Freq 17k

SCLK_Hold 33k

CS_Lead 65k

CS_Trail 70k

CS_Idle 71k

 

depending on HW configuration between HSDIO card and DUT there is need to play a bit with Bus_configuration (CPOL, CS_active_state, CPHA) 🙂

 

Carefully take a look on your SPI communication requirements, as with this lib after each byte there is an toggle on CS line! Which does not work when DUT requires an 16/32/other bits packages.

CLA
www.espotel.com
0 Kudos
Message 156 of 200
(1,776 Views)

Hi David/Dan

 

I came across a problem that I'm trying to solve, but I'm stuck. So I was wondering if you can shed any light on it.

 

In the past I've had separate bytes for instruction and address. So I used the VI as shown in the odd_bytes1.jpg  where I send 1 byte of instruction, 1 byte of address and 2 bytes of data. But In the current project the instruction and the address byte are merged, followed by the data bytes. So I have to send 1 byte for instruction&address combined followed by 6 bytes for data. So I tried to modify the VI as shown in odd_bytes2.jpg, but this isn't working for some reason. The approach I tried is to add more 3 more U8 blocks and concatenate them all, but when I do that it is sending 8 bytes instead of 7 with the 1st byte set to all 0's. I cannot understand why this is happening and how to solve it. Please Help!

 

Regards,

Priyatham.

Download All
0 Kudos
Message 157 of 200
(1,755 Views)

Hello Priyatham,

 

I took a look at your code and I think I understand what is going on, but have to admit that this is the first time I've ever seen the Join Numbers VI used in this way. I didn't even know you could do what you are doing without creating broken wires.

 

You are effectively combining 7 U8 arrays, item-wise, into a single U64 array. It looks like LabVIEW is just finishing up the padding for you with the extra 8 0's. I would recommend rearchitecting the way you are creating your input data by piping all of your current U8 arrays into a for loop, building an array of U8s for your packet and then using a concatenating tunnel to build a single U8 array that passes down to the for loop you are currently using to write your SPI data.

 

That way you'll have more control regarding the order of your data and you'll lose the extra 0's.

Regards,
Dan King

Message 158 of 200
(1,730 Views)

Hi Dan

 

I tried out according to what you said but it didn't work. I may be interpreting your instructions incorrectly. It would help me a lot if you can share a quick example. Thanks a lot for your help.

 

Regards,

Priyatham.

0 Kudos
Message 159 of 200
(1,714 Views)

Hello everyone,

 

I wonder if i could use the SPI library with my PCIe-6320 Card. Does this card support the SPI library ?

If yes, i have issues to run the serial protocol with waveform device. The application returns errrors 200452 with the following explanation : The specify proprety isn't supported by the card, or doesn't apply with this task.

Does someone know how to manage it with this DAQ ?

 

Thank you,

0 Kudos
Message 160 of 200
(1,619 Views)