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Automotive Engine Simulation Library for HIL

Hi Gaurav,

 

I think your question about clockwise or counter-clockwise rotation stems from the visualization seen on the system explorer page for a corresponding cam or crank. The crankwheel in that visualization simply has a time domain signal of the output placed on a circular wheel. The top is marked for TDC at 0 degrees. Since it's a time domain signal of what you would expect to capture with a digitizer, the crankwheel in the visualization would be rotating counter-clockwise.

 

Is the 36 teeth with 2 missing meant to be your cam sensor? From your description of the location alternating between 500 and 140, I would guess that your either specifying a cam signal with the N Teeth M Missing or that you're running a 2-stroke engine (which is doubtful). I remember adding an input somewhere in the custom device to allow users to use the N Teeth M Missing as cam sensor instead of crank (the FPGA code is certainly set up to handle it if the user modifies to input the cycle angle instead of crank angle), but I couldn't find that in the source code that's online. Either I didn't put it in there for a release version because I couldn't come up with a good way to determine whether the cycle or crank angle was wired to the FPGA block or it was removed. Stephen, do you have any additional information on this capability? Let us know if you need cam specification through the N Teeth M Missing, and Stephen might be able to prioritize it for a future version.

 

That still doesn't account for reading 140 or 500 instead of 378. If I'm thinking clearly, 140 would really correspond to 280 degrees if the 36/2 profile is meant for a cam.

 

Regards,

 

Mike Lyons

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Yeah the AES library creates a Crank Angle (0-360) and Cycle Angle (0-720) from the APU subVI... and either of these angles can be used by any of the IP. So if you wanted to use the crank angle with some things and the cycle angle with others... you just change what angle value you're providing the IP.

 

However, none of the documentation (VI help, block diagram comments, control labels) say that. They are all out of date... Which leads the user to believe incorrect things. I'm in the process of updating all of that and will have a new version up soon. This is just a doc update, no functionality changes.

Stephen B
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Hey Stephen,

 

This requires more than a documentation change.

 

The custom device host side code has to change in order to support N Teeth M Missing for 720 degree cam use. “AES N Teeth M Missing Degrees per Tooth” has an input called “NTeeth.Use Cycle?” that has to be true (defaults false) in order to compute the degrees high and degrees low for each tooth if used as a cam. It would be best to determine this from the compiled bitfile to know whether they were using the crank angle or cycle angle for that block, but I don’t think I ever thought of a good way to do that. The other alternative is to let the user set that option on the page, but if they don’t correctly specify which angle was used on the FPGA then a messed up waveform gets generated.

 

On second thought, one way to do it would be to leave it to the FPGA VI to handle supporting the 0-720; meaning that the FPGA VI would multiply (bit shift by 1) the high pulse, low pulse, missing teeth offset, and tdc offset if using the cycle angle. This leaves the repsonsibility on the FPGA developer and could be covered completely by documentation. This might have been what I did previously when another customer need it. I can’t remember and I lost my emails to them.

 

Regards,

 

Mike L

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Good catch on the RT VI. Thankfully you had that select between 720 and 360 already there so all I need to do is make it a recommended input and document it inside the VI help. So the AES library is only a documentation update. (however I did change the event capturing templates to capture all events... having the templates only capture a subset annoyed me 🙂

 

I'll update the custom device with a checkbox now... as that is the least time commitment and provides an easy upgrade path for existing users.

Stephen B
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The AES library and custom device for NIVS have been updated. Feel free to download the newer versions and consult the version history for a change list.

Stephen B
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Hi Mike,

 

Thanks for reply..actually the teeth i have mentioned are for Crank Sensor.My TDC occurs at 360 and 720deg..so when i see 500 deg what is the angle value for my case..I am able to choose 1.no of missing teeth 2.no of teeth. 3.offset between missing teeth and TDC from Veristand System explorer after adding Custom Device in it.The value i want is 378 deg..

Does 500 deg actually represent 378 deg or a value close to that??

 

Thanks and regards,

Gaurav.

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Hi Stephen,

 

Thanks a lot for your reply..Actually i am doing the HIL only for the Crank Sensor..As you told that the TDC is considered to be zero deg..

So when the injector angle is 500 deg..wat is the real value?

Also as i mentioned in FPGA VI i have the option of entering 2 values

1.NTeeth.Crank.missingteeth.offset

2.NTeeth.Crank.TDC.offset

 

So should i enter 360 deg as my TDC offset value as my TDC is at 360 deg.

And could you please also write in brief about the changes you have made in the new AES library..

Is using a FPGA Configuration File for engine HIL also an option for me becaus i cannot us ethe other remaining  I/O's of the FPGA as i don't know how to modify Custom Device and i have tried using FPGA Configuration file for Motor HIL..

 

Thanks and Regards,

Gaurav 

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I am from LIP have a problem in Knock Sensor Generation.  The amplitude of the knocking output does not decrease with time, and once the duration has ended, the output is updated with 0 V.But now we need change the output .The new wave of output is in the attachment.And I don"t konw how to rewrite the program of Knock Sensor Generation.

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Hi Mike,

 

Thanks for the reply.

Actually there is no Cam involved in my case.I am doing HIL only for crank.

If i input a injector pulse to thr FPGA digital input, i expect the start angle to be 378 degrees before TDC, but it is coming to be 500degrees.

The offset of my TDC with missing teeth is 138degrees.

 

Also as i am using the Engine Simulation Custom device, i am not able to use any of the I/O's left in the that FPGA card.

Can you please let me know how to modify the Custom Device, or is it possible to use FPGA configuration file( i will paste the FPGA VI's in the AES in the cinfiguration file)

 

Thanks and Regards,

Gaurav Singla

Tata Motors

9028301347

 

 

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