Automotive and Embedded Networks

[pierreR]

Hello,

In the  9852 and 9853 Help it is written, in the Arbitration chapter :

The output path is implemented as a FIFO. This allows multiple frames to be sent to the CAN module for transmit, thus enabling tests that generate full bus load.

I need to know the size of this FIFO, in fact the number of frames I can put in the output node before it is full. I've in mind that it's 17 but I cannot find where I read thisinfo.

could you confirm it ? and tell me where I can find this info ?

Best regards,

[pierreR]

OK I've found : this KB

[YogeshaYS]

Hi,

I am new to the crio and labview RT.

i am using 9012 RT controller, 9103 CRIO and 9853 CAN card.

I have created the FPGA project, created a FPGA and Realtime VI. I have straightly connected CAN0 and CAN1. CAN1 is powerd with 10v.

the FPGA vi is deployed and the Realtime vi is complied.

Now if i click on the transmitt button in the relatime vi, i am not getting any message.

I have attached the project folder. 

Its very urgent for me. pls do respond. 

waiting for the reply,

 Yogesh