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2 Kudos
S.Kakibe

Replace model file to keep mapping information

Status: New Submitted by Active Participant on 01-10-2013 08:45 AM Comment

Hello,

 

Sometimes, customer want to change current model file with another model file. Once the model file is deleted on system definition, mapping infomation related to deleted model also disappear. To workaround this, we have to export map info, then delete mdl file and add new model, and then import map info...but this process sucks.

 

To save our time, I want to suggest "replace" function as below. When replace the model files, map info for the same inport/outport are kept.

 

Img.png

 

Saku

 

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2 Kudos
joshe

Automatically break about large logging files

Status: New Submitted by Active Participant on 11-08-2012 01:04 PM 2 Comment

Way back when VeriStand was first introduced recorded files could automatically be broken apart when they reached a set size.  This feature went away and I would like it back.  I am running test that will last days at 10Hz or faster, so large files are generated.  This really bogs down DIAdem when the data is analysed.  I would like to be able to set the logging file size max  (i.e. 50 Meg) and when the file hits that size a new file with an incremented name (i.e. TestFile_1) is created and data is now logged to it untill it reaches the set size limit.  This not only creates smaller files that can analysed, it lets the data be looked at sooner in the test cycle.

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1 Kudos
Damian_S

XNET LIN Multiplexing

Status: New Submitted by Member on 10-14-2016 08:23 AM Comment

It would be nice to have support for XNET LIN Multiplexing to use with VeriStand. 

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1 Kudos
StephenB

API to retreive deployed system definition from veristand target(s)

Status: New Submitted by Active Participant on 10-10-2016 11:02 AM Comment

We have dozens are targets that are deployed to by an automated system depending on test cases being run. However, we have no API (short of building our own system) to retreive what system definition a target is currently running. This would help us improve our test case speed by only deploying when needed, and also improve configuration management and traceability.

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2 Kudos
20cs06

Require more customized controls and indicators to veristand Workspace

Status: In Development Submitted by Member on 04-27-2012 11:28 AM 1 Comment

Currently the avaliable Controls and Indicators are not enough for some projects using verisatnd. Since most of the user's doesn't have labview to create, it is better to have more generic controls and indicators.

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1 Kudos
Mr221

Add Generate Error option to real time sequence calls in stimulus profile

Status: New Submitted by Member on 09-28-2016 02:10 PM Comment

Currently the entire realtime sequence must be set to stop execution on fail or not.  It would be better to allow each realtime sequence call the ability to generate an error message on fail and then allow the user to define if the appropriate action would be to notify only and continue, notify and give option to continue or abort, or to abort on fail and notify.   

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2 Kudos
S.Kakibe

Resizable Workspace Controls

Status: In Development Submitted by Active Participant on 02-21-2012 07:10 AM 1 Comment

Hello,

 

Most of Workspace Controls, like nob and bool button,  are not resizable. Resizable controls will allow user to organize Workspace easily.

 

Kind regards,

 

Saku

 

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2 Kudos
S.Kakibe

VeriStand .mat file support

Status: New Submitted by Active Participant on 02-13-2012 02:22 AM Comment

Hello,

 

Matlab/Simulink is used for ECU development process, where .mat file seems to be used as test signal pattern definition. NI products is used for ECU verification process, but the same .mat file could not be used by VeriStand. If VeriStand support .mat file, that would help customers save their time. So I hope: 1.Stimulus Profile can read not only .csv file also .mat file  2. custom device supports .mat file for signal play back.

 

regards,

 

Saku

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2 Kudos
S.Kakibe

Data format options for logging in VeriStand

Status: Completed Submitted by Active Participant on 01-31-2012 08:51 AM 4 Comment

VeriStand can log data in Stimulus Profile, whose extention is .tdms. That include dt(time step) information, but that is not handled as waveform data in DIAdem. That way, it is a bother to gemerate time stamp data.

For example, when DIAdem opens .tdms file created by LabVIEW, the data is handled as waveform data.  So it is easy to generate time stamp data by "Numeric Channels<-> Waveform Channels" functions in DIAdem. However, .tdms file created by VeriStamd is not handled as waveform. So, it is a bother to create and add time stamp data.

 

Improvements: It is better to give some file format options: 1 .tdms format as waveform  2. .csv format with time-stamp

 

Saku

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1 Kudos
A.Sasaki

Watchdog Hardware Trigger

Status: New Submitted by Trusted Enthusiast on 06-27-2016 07:09 PM 1 Comment

It is very helpful if the expired signal of watchdog timer can be routed in the system as PXI Trigger, and so on. Users can use this function easily to increase reliability of their system without creating a Custom Device.

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1 Kudos
Guilherme_Correa

Alias to a Waveform Channel

Status: New Submitted by Member on 04-20-2016 07:06 AM 4 Comment

If your project performs data acquisition of channels as Waveform data type(instead of single point), you can't associate this channel to a Aliases. Since the waveform data type receives a buffer of data, you could choose some common options for that channels, such as max buffer value, mean among others.

Since it does not exist, I had to create an workaround by acquiring data as single point and logged them using embedded data logger, then had to use Diadem to create the waveform channel.

In addition, it would also allow to acquire data in higher rates because the waveform acquisition loop runs ins parallel to the PCL.

This feature would be extrememly handy for those who are using waveform acquisition and logging, and would save me some months of work.

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1 Kudos
SRD

NI Veristand: Ability to enable and disable Alarms in Real Time Sequences execution of Stimulus Profile.

Status: New Submitted by Member on 04-05-2014 06:43 PM Comment

When running a stimulus profile in NI Veristand, there is currently no direct way of enabling/disabling  Alarms in real time sequences. It would be great to have this capability for use in real time sequence when you are transitioning a channel value with an initial set of abort limits to a new set of abort limits. With the current set up while transitioning depending on the rate of change of the channel value we may hit the upper or lower limits to an abort condition and trigger a procedure even though we actually meant to change the channel to different value with new channel limits.

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1 Kudos
h_yong

Stimulus profile UUT dialog prompt enhancement

Status: New Submitted by Active Participant on 05-08-2013 11:53 AM 1 Comment

I'd like to be able to customize the UUT dialog prompt that comes up when the stimulus profile starts. For example, I'd like to be able to see my most recent entries or have them saved in a pulldown for easy repeated access. Thanks.

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1 Kudos
h_yong

Handle strings in stimulus profile editor

Status: New Submitted by Active Participant on 04-27-2013 02:31 AM Comment

It'd be great to be able to convert between strings and numbers in the stimulus profile editor. This way we can easily create and use multiple variables that are like:

User1Var, User2Var, User3Var, ..., UserNVar

Also, if we have those channels defined in the system definition, then we could right to multiple variables via parameters in one for loop by incrementing a loop counter. Thanks.

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1 Kudos
Daniel-E

VLM and Flex Support: TIMEOUTALL Option

Status: New Submitted by Active Participant on 01-14-2013 12:47 PM 1 Comment

Currently, our NILM license daemon doesn't support the TIMEOUTALL function when used with a FlexNet server. The purpose of the timeout is to cause an application to release its license if idle, which is useful in the case that a user doesn't realize LabVIEW or another NI program is still open on the client machine. The TIMEOUTALL command is a standard FlexNet option.

 

It would be useful if we provided this function, or provided a similar function in the Volume License Manager server product.

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1 Kudos
Brandyn

Ability to Map Aliases

Status: Duplicate Submitted by Member on 10-09-2012 11:31 AM 1 Comment

I would like the ability to Map Aliases.  Creating Aliases for things helps make the project more maintainable and makes it easier to swap hardware.

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1 Kudos
Brandyn

Veristand Channels to support other data types

Status: New Submitted by Member on 10-09-2012 11:29 AM Comment

I would really like it if VeriStand channels supported other data types like Strings, or arrays. The channels can even be Variants that would allow me to use any datatype I want.

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0 Kudos
ATarman

[VeriStand] Edit System Definition file while project is deployed

Status: New Submitted by Member on 03-29-2023 06:53 AM Comment

The way we use VeriStand [currently 2019 SP1] and the INERTIA custom device for drivetrain testing, we work off a project template that may be reused for new tests, but a great deal of editing must be made to the system definition file for each project.  

While starting up a new test fixture, I am undeploying the VeriStand project multiple times per day to make edits to the system definition file procedures, alarms, calculated channels, etc.....items that can not be edited [or at least retained after undeployment, such as alarm and user channel variables].  

I would like the opportunity to edit a system definition file while the project is deployed so I do not lose downtime on test run time.  Would it be possible to, similar to SharePoint, "check out" a system definition file to edit it while the project is deployed, and after the edits are completed, undeploy and then "check in" the new system definition file.  

This feature could be integrated with a versioning feature to retain a specific number of revisions of the system definition file - say a preference that specifies to retain 15 prior versions of the system definition file.  

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0 Kudos
MaWei

[VeriStand] Channel path as parameter for RT Sequence

Status: New Submitted by Member on 11-15-2021 06:24 AM Comment

When testing, the beauty of automation is, that we can do the same test on many instances just by copy & pasting the code and modify the in-/outputs. Unfortunately, the stimulus profile editor is not know for it's usability when it comes to copy & paste or even applying changes to multiple lines at once.

 

Now what would be a great addition here, would be to actually rely on the hierarchy of channels (the prime example are CAN Frames). I want to perform the same test, using different CAN Frames that contain some signals for a motor.

MotorLeft_Status/Position

MotorLeft_Status/Speed

MotorLeft_Status/ErrorBit

 

MotorRight_Status/Position

MotorRight_Status/Speed

MotorRight_Status/ErrorBit

 

To perform the same test on these signals, I'd have to call a realtime sequence with all of the above as parameters. What I want to do, is just give the Top-Level Path (MotorRight_Status and on the next call MotorLeft_Status) to the sequence and then within the sequence, read the actual signals that I need from this CAN Frame.

 

The same could be done for the physical signals of the motor if they're organised nicely.

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0 Kudos
labviewman

Synchronize RT Time to PC time when Veristand Project is deployed

Status: New Submitted by Member on 09-24-2021 05:52 AM Comment

RT time is not the same as PC time unless you:

 

1) manually set PC and RT time so the y match

2) configuring the PC and RT Linux to sync to an internet NTP time server (requires a special configuration on the RT target)

3) configuring the PC and RT Linux to sync to a NTP time server on the local LAN (requires a special configuration on the RT target)

 

Why is it important for the computer time to match or at least be within a few seconds? Because the logfile name is based off of PC time and the data timestamps are based off of RT time.  If the time between the computers don't match, confusion exists as to why there are different times.

 

A very simple solution is to sync the PXI time clock to the PC time when the Veristand project is deployed.  At least for a few days the timestamps will be within a few seconds of each other.

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