03-20-2017 02:11 PM
Hi,
I want to generate a sine wave of a known frequency and amplitude on analogue out (ConnectorA/AO0) of myRIO.
Any ideas how to do that? I have tried looking at example codes in the forum but nothing has worked for me so far.
Best Regards,
Mubeen Haadi.
03-21-2017 09:11 AM
There are a couple of approaches we can take for this task. There is an example VI included in the NI Example Finder named "Customized FPGA Signal Generator" that will allow you to do this without having to add anything to the code. Additionally, you can use the "Ex_Inst_Simulate Signal" Express VI to configure and generate analog output signals.
03-23-2017 12:13 PM
Hi, thank you for diracting me to that example. that is really good example code and now I am understanding how the signal generation is working. I was wondering though what is the highest frequency that can be generated?
can you give me another "hint" on how I can generate and read a sine wave simultaneously ?
03-24-2017 11:25 AM
The highest frequency will be dependent on a few things: if you're running the code on your PC it will be based on your computer's timing, if it is running on the FPGA, what else is running on the FPGA, or if you are creating this signal to run as analog output it will be be based off the analog sample timing. So it is going to be hard to determine the highest rate that we will be able to run at any given time but more about the myRIO timing can be found in the following spec sheet.
NI myRIO-1900
http://www.ni.com/pdf/manuals/376047c.pdf
Also, to read simultaneously you could read the signal you are generating via a graph indicator on the front panel.
03-24-2017 12:59 PM
Hi, the following image shows the code for the FPGA side and the configuration of the sine wave generator. The quality of the sine wave drops considerably when I increase the frequency beyond 500 Hz?
03-27-2017 03:14 PM - edited 03-27-2017 03:15 PM
If you change the amplitude resolution does the quality of the sine wave improve?
03-28-2017 01:11 AM
yes, the lower the amplitude, the better the quality.
04-07-2017 10:09 AM
Have you tried interfacing with the "Ex_Inst_Simulate Signal" Express VI on the Real-Time target instead of the FPGA?
04-07-2017 04:25 PM
how do I do that? can you share a screen shot?
Best Regards,
Mubeen Haadi.
04-10-2017 02:22 PM
You would need to structure your project similar to the attached image with the Waveform Generation VI located on the device but not located on the FPGA.