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NI Discussion Forums :
Additional NI Product Boards :
Real-Time Measurement and Control :
Re: remote front panel--cRIO 9012
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Re: remote front panel--cRIO 9012
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 NathanK
Proven Veteran
Message 2 of 6
Viewed 839 times
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Is the VI loaded into memory? Is should be either running as a startup app (if the startup stops it will leave memory) or opened from the host? If it is- is the name of the VI in the html page correct? Nathan
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11-06-2008 05:04 PM
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Re: remote front panel--cRIO 9012
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 Tunnel_Brian
Member
Message 3 of 6
Viewed 834 times
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If I understand the term correctly, it is running as a startup app--the VI starts running by itself after the reset button is pressed on the cRIO. I know it is running because the IO is operating correctly. I checked the .html that was created using the Web Publishing Tool, and the name of the VI is correct.
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11-06-2008 05:27 PM
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Re: remote front panel--cRIO 9012
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Tunnel_Brian
Member
Message 4 of 6
Viewed 816 times
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Alright, so I think I've figured out part of my problem, but I don't know what the solution is. Apparently, I can only make a VI a Startup VI in a Real-Time Application if it is located where RemotePanelTest.vi is shown below. I successfully used the Remote Front Panel with RemotePanelTest.vi. However, I am unable to add LaserTrigger_v7.vi as a Startup VI. This is why I was unable to access LaserTrigger_v7 from the Remote Panel. This is a problem because I am not able to access my FPGA I/O (NI 9401) from VIs located in the branch where RemotePanelTest.vi is located. I am only able to read/write to these I/O from the branch where LaserTrigger_v7.vi is located. Am I missing something? Any suggestions on how best to accomodate both the need for Remote Front Panel and FPGA I/O? 
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11-07-2008 01:37 PM
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Re: remote front panel--cRIO 9012
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Jared_B
Proven Veteran
Message 5 of 6
Viewed 783 times
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Brian, What you are seeing is correct behavior. What you need to do is get your IO from your FPGA to your RT by one of two methods (as I see you are using LabVIEW 8.5.1 or older). The first method is to use a Read/Write Control Node on your RT VI to access the controls and indicators on your FPGA VI. The second method is to use a DMA FIFO to have your FPGA VI write its data to the FIFO and have your RT VI read from the FIFO. These are the methods that you will need to use to accomplish the task you are wanting. I'd recommend a basic FPGA Module Training available here: http://zone.ni.com/devzone/cda/tut/p/id/3555#toc5 Specifically lesson 6.
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 Accepted Solution
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11-12-2008 10:46 AM
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