Hello,
I want to generate in FPGA classical signals (sinus, square, triangle, sawtooth).
I am using an Ethernet RIO 9146 with a NI 9263.
I am using the vi Sine Wave for the sinus.
The output frequency must be between 0.02 and 1Hz.
When i display the sinus in a scope, for example at 0.02Hz, the period isn't 50s but 53.6s (at 1Hz, the frequency is 0.995Hz).
At 1kHz the accuracy is good.
I think the problem is that the vi Sine Wave use as an input not the frequency but the frequency divided by the FPGA Clock Rate (40MHz).
When i put the result of this division in a FXP 32bit, the result isn't accurate (when i multiply the result by 40MHz and calculate the period, i find approximately 53.6s).
When i put the result in a FXP 64bits, the result is correct.
My problem is that the vi Sine Wave has a 32bit input for the frequency and this isn't enough accurate.
What can i do to have an accurate frequency for my sinus?
